boost/build
2
0
Fork 0
mirror of https://github.com/boostorg/build.git synced 2026-02-21 15:02:19 +00:00
Code Issues Projects Releases Wiki Activity

Added Rocket Lake, Alder Lake, Sapphire Rapids and Zen 3 instruction sets. (#147)

Browse Source
This commit is contained in:
Andrey Semashev
2022-04-10 00:53:31 +03:00
committed by GitHub
parent cb23d0955c
commit e8a11169a1
8 changed files with 23 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/tools/builtin.py
View File

@@ -288,11 +288,11 @@ def register_globals ():
'pentium3m', 'pentium-m', 'pentium4', 'pentium4m', 'prescott', 'nocona', 'core2', 'corei7', 'corei7-avx', 'core-avx-i',
'conroe', 'conroe-xe', 'conroe-l', 'allendale', 'merom', 'merom-xe', 'kentsfield', 'kentsfield-xe', 'penryn', 'wolfdale',
'yorksfield', 'nehalem', 'sandy-bridge', 'ivy-bridge', 'haswell', 'broadwell', 'skylake', 'skylake-avx512', 'cannonlake',
'icelake-client', 'icelake-server', 'cascadelake', 'cooperlake', 'tigerlake',
'icelake-client', 'icelake-server', 'cascadelake', 'cooperlake', 'tigerlake', 'rocketlake', 'alderlake', 'sapphirerapids',
'atom',
'k6', 'k6-2', 'k6-3', 'athlon', 'athlon-tbird', 'athlon-4', 'athlon-xp', 'athlon-mp', 'k8', 'opteron', 'athlon64', 'athlon-fx',
'k8-sse3', 'opteron-sse3', 'athlon64-sse3', 'amdfam10', 'barcelona', 'bdver1', 'bdver2', 'bdver3', 'btver1',
'btver2', 'znver1', 'znver2',
'btver2', 'znver1', 'znver2', 'znver3',
'winchip-c6', 'winchip2',
'c3', 'c3-2', 'c7',

5
src/tools/features/instruction-set-feature.jam
View File

@@ -27,11 +27,12 @@ feature.feature instruction-set
pentium3m pentium-m pentium4 pentium4m prescott nocona core2 corei7 corei7-avx core-avx-i
conroe conroe-xe conroe-l allendale merom merom-xe kentsfield kentsfield-xe penryn wolfdale
yorksfield nehalem sandy-bridge ivy-bridge haswell broadwell skylake skylake-avx512 cannonlake
icelake-client icelake-server cascadelake cooperlake tigerlake
icelake-client icelake-server cascadelake cooperlake tigerlake rocketlake alderlake
sapphirerapids
atom
k6 k6-2 k6-3 athlon athlon-tbird athlon-4 athlon-xp athlon-mp k8 opteron athlon64 athlon-fx
k8-sse3 opteron-sse3 athlon64-sse3 amdfam10 barcelona bdver1 bdver2 bdver3 bdver4 btver1
btver2 znver1 znver2
btver2 znver1 znver2 znver3
winchip-c6 winchip2
c3 c3-2 c7

4
src/tools/gcc.jam
View File

@@ -1173,6 +1173,9 @@ cpu-flags gcc OPTIONS : x86 : icelake-server : -march=icelake-server ;
cpu-flags gcc OPTIONS : x86 : cascadelake : -march=skylake-avx512 -mavx512vnni ;
cpu-flags gcc OPTIONS : x86 : cooperlake : -march=cooperlake ;
cpu-flags gcc OPTIONS : x86 : tigerlake : -march=tigerlake ;
cpu-flags gcc OPTIONS : x86 : rocketlake : -march=rocketlake ;
cpu-flags gcc OPTIONS : x86 : alderlake : -march=alderlake ;
cpu-flags gcc OPTIONS : x86 : sapphirerapids : -march=sapphirerapids ;
cpu-flags gcc OPTIONS : x86 : k6 : -march=k6 ;
cpu-flags gcc OPTIONS : x86 : k6-2 : -march=k6-2 ;
cpu-flags gcc OPTIONS : x86 : k6-3 : -march=k6-3 ;
@@ -1199,6 +1202,7 @@ cpu-flags gcc OPTIONS : x86 : btver1 : -march=btver1 ;
cpu-flags gcc OPTIONS : x86 : btver2 : -march=btver2 ;
cpu-flags gcc OPTIONS : x86 : znver1 : -march=znver1 ;
cpu-flags gcc OPTIONS : x86 : znver2 : -march=znver2 ;
cpu-flags gcc OPTIONS : x86 : znver3 : -march=znver3 ;
cpu-flags gcc OPTIONS : x86 : winchip-c6 : -march=winchip-c6 ;
cpu-flags gcc OPTIONS : x86 : winchip2 : -march=winchip2 ;
cpu-flags gcc OPTIONS : x86 : c3 : -march=c3 ;

4
src/tools/gcc.py
View File

@@ -780,6 +780,9 @@ cpu_flags('gcc', 'OPTIONS', 'x86', 'icelake-server', ['-march=icelake-server'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'cascadelake', ['-march=skylake-avx512', '-mavx512vnni'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'cooperlake', ['-march=cooperlake'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'tigerlake', ['-march=tigerlake'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'rocketlake', ['-march=rocketlake'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'alderlake', ['-march=alderlake'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'sapphirerapids', ['-march=sapphirerapids'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'k6', ['-march=k6'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'k6-2', ['-march=k6-2'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'k6-3', ['-march=k6-3'])
@@ -805,6 +808,7 @@ cpu_flags('gcc', 'OPTIONS', 'x86', 'btver1', ['-march=btver1'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'btver2', ['-march=btver2'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'znver1', ['-march=znver1'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'znver2', ['-march=znver2'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'znver3', ['-march=znver3'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'winchip-c6', ['-march=winchip-c6'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'winchip2', ['-march=winchip2'])
cpu_flags('gcc', 'OPTIONS', 'x86', 'c3', ['-march=c3'])

5
src/tools/intel-darwin.jam
View File

@@ -138,10 +138,11 @@ flags intel-darwin.compile OPTIONS <optimization>space : -O1 ; # no specific spa
merom-xe kentsfield kentsfield-xe penryn wolfdale
yorksfield nehalem sandy-bridge ivy-bridge haswell
broadwell skylake skylake-avx512 cannonlake icelake-client
icelake-server cascadelake cooperlake tigerlake ;
icelake-server cascadelake cooperlake tigerlake rocketlake
alderlake sapphirerapids ;
.cpu-type-amd64 = k8 opteron athlon64 athlon-fx k8-sse3 opteron-sse3
athlon64-sse3 amdfam10 barcelona bdver1 bdver2 bdver3
bdver4 btver1 btver2 znver1 znver2 ;
bdver4 btver1 btver2 znver1 znver2 znver3 ;
.cpu-type-x86-64 = $(.cpu-type-em64t) $(.cpu-type-amd64) ;
flags intel-darwin.compile OPTIONS <instruction-set>$(.cpu-type-x86-64)/<address-model>32 : -m32 ; # -mcmodel=small ;

4
src/tools/intel-vxworks.jam
View File

@@ -117,10 +117,10 @@ flags intel-vxworks.compile INCLUDES <include> ;
yorksfield nehalem sandy-bridge ivy-bridge haswell
broadwell skylake skylake-avx512 cannonlake
icelake-client icelake-server cascadelake cooperlake
tigerlake ;
tigerlake rocketlake alderlake sapphirerapids ;
.cpu-type-amd64 = k8 opteron athlon64 athlon-fx k8-sse3 opteron-sse3
athlon64-sse3 amdfam10 barcelona bdver1 bdver2 bdver3 btver1 btver2
znver1 znver2 ;
znver1 znver2 znver3 ;
.cpu-type-x86-64 = $(.cpu-type-em64t) $(.cpu-type-amd64) ;
#flags intel-vxworks.compile OPTIONS <instruction-set>$(.cpu-type-x86-64)/<address-model>32 : -m32 ; # -mcmodel=small ;

5
src/tools/msvc.jam
View File

@@ -2144,10 +2144,11 @@ for local arch in [ MATCH "^\\.cpus-on-(.*)" : [ VARNAMES $(__name__) ] ]
merom-xe kentsfield kentsfield-xe penryn wolfdale
yorksfield nehalem sandy-bridge ivy-bridge haswell
broadwell skylake skylake-avx512 cannonlake icelake-client
icelake-server cascadelake cooperlake tigerlake ;
icelake-server cascadelake cooperlake tigerlake rocketlake
alderlake sapphirerapids ;
.cpu-type-amd64 = k8 opteron athlon64 athlon-fx k8-sse3 opteron-sse3
athlon64-sse3 amdfam10 barcelona bdver1 bdver2 bdver3
bdver4 btver1 btver2 znver1 znver2 ;
bdver4 btver1 btver2 znver1 znver2 znver3 ;
.cpu-type-g7 = pentium4 pentium4m athlon athlon-tbird athlon-4 athlon-xp
athlon-mp $(.cpu-type-em64t) $(.cpu-type-amd64) ;
.cpu-type-itanium = itanium itanium1 merced ;

4
src/tools/msvc.py
View File

@@ -1256,9 +1256,9 @@ __cpu_type_g6 = ['i686', 'pentiumpro', 'pentium2', 'pentium3', 'pentium3m'
__cpu_type_em64t = ['prescott', 'nocona', 'core2', 'corei7', 'corei7-avx', 'core-avx-i', 'conroe', 'conroe-xe', 'conroe-l', 'allendale', 'merom',
'merom-xe', 'kentsfield', 'kentsfield-xe', 'penryn', 'wolfdale',
'yorksfield', 'nehalem', 'sandy-bridge', 'ivy-bridge', 'haswell', 'broadwell', 'skylake', 'skylake-avx512', 'cannonlake',
'icelake-client', 'icelake-server', 'cascadelake', 'cooperlake', 'tigerlake' ]
'icelake-client', 'icelake-server', 'cascadelake', 'cooperlake', 'tigerlake', 'rocketlake', 'alderlake', 'sapphirerapids' ]
__cpu_type_amd64 = ['k8', 'opteron', 'athlon64', 'athlon-fx', 'k8-sse3', 'opteron-sse3', 'athlon64-sse3', 'amdfam10', 'barcelona',
'bdver1', 'bdver2', 'bdver3', 'btver1', 'btver2', 'znver1', 'znver2' ]
'bdver1', 'bdver2', 'bdver3', 'btver1', 'btver2', 'znver1', 'znver2', 'znver3' ]
__cpu_type_g7 = ['pentium4', 'pentium4m', 'athlon', 'athlon-tbird', 'athlon-4', 'athlon-xp'
'athlon-mp'] + __cpu_type_em64t + __cpu_type_amd64
__cpu_type_itanium = ['itanium', 'itanium1', 'merced']