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Separated Skylake-X level of AVX-512 to a new config macro.

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The new BOOST_UUID_USE_AVX512_V1 config macro indicates presence of
AVX-512F, VL, CD, BW and DQ extensions, which are supported by Intel
Skylake-X and similar processors. BOOST_UUID_USE_AVX10_1 is still
retained and indicates support for full AVX10.1 set. For now, it only
adds support for VBMI, but this list may grow in the future as new
extensions are being utilized.
This commit is contained in:
Andrey Semashev
2025-12-31 19:53:20 +03:00
parent f7718fd7cc
commit d0c74979a9
4 changed files with 33 additions and 17 deletions
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13
doc/uuid/configuration.adoc
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@@ -32,15 +32,18 @@ However, there are a few options that can be enabled by defining macros prior to
|If defined, enables optimizations for https://en.wikipedia.org/wiki/SSE4#SSE4.1[SSE4.1] extensions available in x86 processors.
|`BOOST_UUID_USE_AVX`
|If defined, enables optimizations for https://en.wikipedia.org/wiki/Advanced_Vector_Extensions[AVX] extensions available in modern x86 processors.
|If defined, enables optimizations for https://en.wikipedia.org/wiki/Advanced_Vector_Extensions[AVX] extensions available in x86 processors.
|`BOOST_UUID_USE_AVX2`
|If defined, enables optimizations for https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2[AVX2] extensions available in modern x86 processors.
|If defined, enables optimizations for https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2[AVX2] extensions available in x86 processors.
|`BOOST_UUID_USE_AVX512_V1`
|If defined, enables optimizations for https://en.wikipedia.org/wiki/AVX-512[AVX-512] F, VL, CD, BW and DQ extensions available in x86 processors (e.g. in Intel Skylake-X).
|`BOOST_UUID_USE_AVX10_1`
|If defined, enables optimizations for https://en.wikipedia.org/wiki/AVX-512[AVX-512] and https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#AVX10[AVX10.1] extensions available in modern x86 processors.
When defined by user, this macro indicates support for the full set of instructions defined in AVX10.1. Currently, the library does not require 512-bit vectors and is compatible with CPUs implementing AVX-512F,
CD, VL, BW and DQ instruction subsets (i.e. equivalent to Intel Skylake-X), so it may auto-detect and use AVX-512 even if only those subsets are supported.
|If defined, enables optimizations for https://en.wikipedia.org/wiki/AVX-512[AVX-512] and https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#AVX10[AVX10.1] extensions available in x86 processors.
When defined by user, this macro indicates support for the full set of instructions defined in AVX10.1. When auto-detected by the library, this macro may be defined even when not all AVX10.1 subsets
are enabled, but rather when the detected subset is sufficient for the library.
|===