diff --git a/include/boost/atomic/detail/gcc-ppc.hpp b/include/boost/atomic/detail/gcc-ppc.hpp index 1034639..ce75c20 100644 --- a/include/boost/atomic/detail/gcc-ppc.hpp +++ b/include/boost/atomic/detail/gcc-ppc.hpp @@ -130,7 +130,8 @@ public: { uint32_t original; atomics::detail::ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -170,32 +171,6 @@ public: #endif #define BOOST_ATOMIC_BOOL_LOCK_FREE 2 -/* Would like to move the slow-path of failed compare_exchange -(that clears the "success" bit) out-of-line. gcc can in -principle do that using ".subsection"/".previous", but Apple's -binutils seemingly does not understand that. Therefore wrap -the "clear" of the flag in a macro and let it remain -in-line for Apple -*/ - -#if !defined(__APPLE__) - -#define BOOST_ATOMIC_ASM_SLOWPATH_CLEAR \ - "9:\n" \ - ".subsection 2\n" \ - "2: addi %1,0,0\n" \ - "b 9b\n" \ - ".previous\n" \ - -#else - -#define BOOST_ATOMIC_ASM_SLOWPATH_CLEAR \ - "b 9f\n" \ - "2: addi %1,0,0\n" \ - "9:\n" \ - -#endif - namespace boost { namespace atomics { namespace detail { @@ -222,7 +197,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m"(v_) : "r" (v) @@ -234,7 +210,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -251,7 +228,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -273,15 +251,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -302,16 +281,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -328,7 +307,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -337,7 +317,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -347,7 +328,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -356,7 +338,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -366,7 +349,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "and %1,%0,%3\n" @@ -374,7 +358,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -384,7 +369,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "or %1,%0,%3\n" @@ -392,7 +378,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -402,7 +389,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "xor %1,%0,%3\n" @@ -410,7 +398,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -450,7 +439,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m"(v_) : "r" (v) @@ -462,7 +452,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -479,7 +470,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -501,16 +493,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -531,16 +523,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -557,7 +549,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -566,7 +559,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -576,7 +570,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -585,7 +580,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -595,7 +591,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "and %1,%0,%3\n" @@ -603,7 +600,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -613,7 +611,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "or %1,%0,%3\n" @@ -621,7 +620,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -631,7 +631,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "xor %1,%0,%3\n" @@ -639,7 +640,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -679,7 +681,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m"(v_) : "r" (v) @@ -691,7 +694,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -708,7 +712,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -730,16 +735,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -760,16 +765,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -786,7 +791,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -795,7 +801,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -805,7 +812,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -814,7 +822,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -824,7 +833,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "and %1,%0,%3\n" @@ -832,7 +842,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -842,7 +853,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "or %1,%0,%3\n" @@ -850,7 +862,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -860,7 +873,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "xor %1,%0,%3\n" @@ -868,7 +882,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -908,7 +923,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m"(v_) : "r" (v) @@ -920,7 +936,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -937,7 +954,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -959,16 +977,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -989,16 +1007,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1015,7 +1033,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -1024,7 +1043,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1034,7 +1054,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -1043,7 +1064,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1053,7 +1075,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "and %1,%0,%3\n" @@ -1061,7 +1084,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1071,7 +1095,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "or %1,%0,%3\n" @@ -1079,7 +1104,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1089,7 +1115,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "xor %1,%0,%3\n" @@ -1097,7 +1124,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1144,7 +1172,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v = const_cast(v_); - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "cmpw %0, %0\n" "bne- 1f\n" "1:\n" @@ -1161,7 +1190,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -1183,16 +1213,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1213,16 +1243,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1239,7 +1269,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -1247,7 +1278,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1257,7 +1289,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -1265,7 +1298,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1275,7 +1309,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "and %1,%0,%3\n" @@ -1283,7 +1318,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1293,7 +1329,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "or %1,%0,%3\n" @@ -1301,7 +1338,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1311,7 +1349,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "xor %1,%0,%3\n" @@ -1319,7 +1358,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1368,7 +1408,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v = const_cast(v_); - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "cmpd %0, %0\n" "bne- 1f\n" "1:\n" @@ -1385,7 +1426,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y1\n" "stdcx. %2,%y1\n" @@ -1407,16 +1449,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1437,16 +1479,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1463,7 +1505,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "add %1,%0,%3\n" @@ -1471,7 +1514,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1481,7 +1525,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "sub %1,%0,%3\n" @@ -1489,7 +1534,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1499,7 +1545,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "and %1,%0,%3\n" @@ -1507,7 +1554,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1517,7 +1565,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "or %1,%0,%3\n" @@ -1525,7 +1574,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1535,7 +1585,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "xor %1,%0,%3\n" @@ -1543,7 +1594,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1588,7 +1640,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m" (v_) : "r" (v) @@ -1600,7 +1653,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -1618,7 +1672,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -1640,16 +1695,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1670,16 +1725,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1702,7 +1757,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -1710,7 +1766,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1720,7 +1777,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -1728,7 +1786,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1761,7 +1820,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m" (v_) : "r" (v) @@ -1773,7 +1833,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -1791,7 +1852,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -1813,16 +1875,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1843,16 +1905,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -1870,7 +1932,8 @@ public: v = v * sizeof(*v_); value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "add %1,%0,%3\n" @@ -1878,7 +1941,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1889,7 +1953,8 @@ public: v = v * sizeof(*v_); value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y2\n" "sub %1,%0,%3\n" @@ -1897,7 +1962,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -1938,7 +2004,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "std %1, %0\n" : "+m" (v_) : "r" (v) @@ -1950,7 +2017,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ ( + __asm__ __volatile__ + ( "ld %0, %1\n" "cmpd %0, %0\n" "bne- 1f\n" @@ -1968,7 +2036,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y1\n" "stdcx. %2,%y1\n" @@ -1990,16 +2059,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -2020,16 +2089,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -2052,7 +2121,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "add %1,%0,%3\n" @@ -2060,7 +2130,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -2070,7 +2141,8 @@ public: { value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "sub %1,%0,%3\n" @@ -2078,7 +2150,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -2111,7 +2184,8 @@ public: store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT { ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "std %1, %0\n" : "+m" (v_) : "r" (v) @@ -2123,7 +2197,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { value_type v; - __asm__ ( + __asm__ __volatile__ + ( "ld %0, %1\n" "cmpd %0, %0\n" "bne- 1f\n" @@ -2141,7 +2216,8 @@ public: { value_type original; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y1\n" "stdcx. %2,%y1\n" @@ -2163,16 +2239,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -2193,16 +2269,16 @@ public: { int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected), "=&b" (success), "+Z"(v_) : "b" (expected), "b" (desired) : "cr0" @@ -2220,7 +2296,8 @@ public: v = v * sizeof(*v_); value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "add %1,%0,%3\n" @@ -2228,7 +2305,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -2239,7 +2317,8 @@ public: v = v * sizeof(*v_); value_type original, tmp; ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y2\n" "sub %1,%0,%3\n" @@ -2247,7 +2326,8 @@ public: "bne- 1b\n" : "=&b" (original), "=&b" (tmp), "+Z"(v_) : "b" (v) - : "cc"); + : "cc" + ); ppc_fence_after(order); return original; } @@ -2295,7 +2375,8 @@ public: storage_type tmp = 0; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m" (v_) : "r" (tmp) @@ -2307,7 +2388,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { storage_type tmp; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -2329,7 +2411,8 @@ public: storage_type tmp = 0, original; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -2357,16 +2440,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2392,16 +2475,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2453,7 +2536,8 @@ public: storage_type tmp = 0; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m" (v_) : "r" (tmp) @@ -2465,7 +2549,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { storage_type tmp; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -2487,7 +2572,8 @@ public: storage_type tmp = 0, original; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -2515,16 +2601,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2550,16 +2636,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2611,7 +2697,8 @@ public: storage_type tmp = 0; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "stw %1, %0\n" : "+m" (v_) : "r" (tmp) @@ -2623,7 +2710,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { storage_type tmp; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "lwz %0, %1\n" "cmpw %0, %0\n" "bne- 1f\n" @@ -2645,7 +2733,8 @@ public: storage_type tmp = 0, original; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "lwarx %0,%y1\n" "stwcx. %2,%y1\n" @@ -2673,16 +2762,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2708,16 +2797,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: lwarx %0,%y2\n" "cmpw %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stwcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2771,7 +2860,8 @@ public: storage_type tmp; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "std %1, %0\n" : "+m" (v_) : "r" (tmp) @@ -2783,7 +2873,8 @@ public: load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT { storage_type tmp; - __asm__ __volatile__ ( + __asm__ __volatile__ + ( "ld %0, %1\n" "cmpd %0, %0\n" "bne- 1f\n" @@ -2805,7 +2896,8 @@ public: storage_type tmp = 0, original; memcpy(&tmp, &v, sizeof(value_type)); ppc_fence_before(order); - __asm__ ( + __asm__ __volatile__ + ( "1:\n" "ldarx %0,%y1\n" "stdcx. %2,%y1\n" @@ -2833,16 +2925,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" - "bne- 2f\n" - "addi %1,0,1\n" + "bne- 1f\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0" @@ -2868,16 +2960,16 @@ public: int success; ppc_fence_before(success_order); - __asm__( + __asm__ __volatile__ + ( + "li %1, 0\n" "0: ldarx %0,%y2\n" "cmpd %0, %3\n" - "bne- 2f\n" + "bne- 1f\n" "stdcx. %4,%y2\n" "bne- 0b\n" - "addi %1,0,1\n" + "li %1, 1\n" "1:" - - BOOST_ATOMIC_ASM_SLOWPATH_CLEAR : "=&b" (expected_s), "=&b" (success), "+Z"(v_) : "b" (expected_s), "b" (desired_s) : "cr0"