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Updated SDM reference in comments.

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This commit is contained in:
Andrey Semashev
2025-12-29 17:20:49 +03:00
parent bf58085780
commit 84dccb548a
1 changed files with 2 additions and 2 deletions
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4
include/boost/atomic/detail/core_arch_ops_gcc_x86.hpp
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@@ -942,7 +942,7 @@ struct gcc_dcas_x86_64
#if defined(__AVX__)
if (BOOST_LIKELY(order != memory_order_seq_cst && (((uintptr_t)&storage) & 15u) == 0u))
{
// According to SDM Volume 3, 8.1.1 Guaranteed Atomic Operations, processors supporting AVX guarantee
// According to SDM rev.88 from June 2025, Volume 3, 10.1.1 Guaranteed Atomic Operations, processors supporting AVX guarantee
// aligned vector moves to be atomic.
#if defined(BOOST_HAS_INT128)
xmm_t value = { static_cast< std::uint64_t >(v), static_cast< std::uint64_t >(v >> 64u) };
@@ -980,7 +980,7 @@ struct gcc_dcas_x86_64
#if defined(__AVX__)
if (BOOST_LIKELY((((uintptr_t)&storage) & 15u) == 0u))
{
// According to SDM Volume 3, 8.1.1 Guaranteed Atomic Operations, processors supporting AVX guarantee
// According to SDM rev.88 from June 2025, Volume 3, 10.1.1 Guaranteed Atomic Operations, processors supporting AVX guarantee
// aligned vector moves to be atomic.
xmm_t v;
__asm__ __volatile__